The APW8813/A integrates a synchronous buck PWM controller to generate VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It provides a complete power supply for DDR2 and DDR3 memory system. It offers the lowest total solution cost in system where space is at a premium. The APW8813/A provides excellent transient response and accurate DC voltage output in either PFM or PWM Mode. In Pulse Frequency Mode (PFM), the APW8813/A provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. On TQFN4x4- 24A package, the Forced PWM Mode works nearly at constant frequency for low-noise requirements. The APW8813/A is equipped with accurate current-limit, output under-voltage, and output over-voltage protections. A Power-On-Reset function monitors the voltage on VCC prevents wrong operation during power on. The LDO is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The device integrates two power transistors to source or sink current up to 1.5A. It also incorporates current-limit and thermal shutdown protection. The output voltage of LDO tracks the voltage at VTTREF pin. An internal resistor divider is used to provide a half voltage of VDDQ for VTTREF and VTT Voltage. The VTT output voltage is only requiring 20mF of ceramic output capacitance for stability and fast transient response. The S3 and S5 pins provide the sleep state for VTT (S3 state) and suspend state (S4/S5 state) for device, when S5 and S3 are both pulled low the device provides the soft-off for VTT and VTTREF.