General DescriptionThe MM74HC165 high speed PARALLEL-IN/SERIAL-OUTSHIFT REGISTER utilizes advanced silicon-gate CMOStechnology. It has the low power consumption and highnoise immunity of standard CMOS integrated circuits,along with the ability to drive 10 LS-TTL loads.This 8-bit serial shift register shifts data from QA to QHwhen clocked. Parallel inputs to each stage are enabled bya low level at the SHIFT/LOAD input. Also included is agated CLOCK input and a complementary output from theeighth bit.Clocking is accomplished through a 2-input NOR gate per-mitting one input to be used as a CLOCK INHIBIT function.Holding either of the CLOCK inputs high inhibits clocking,and holding either CLOCK input low with the SHIFT/LOADinput high enables the other CLOCK input. Data transferoccurs on the positive going edge of the clock. Parallel loading is inhibited as long as the SHIFT/LOAD input isHIGH. When taken LOW, data at the parallel inputs isloaded directly into the register independent of the state ofthe clock.The 74HC logic family is functionally as well as pin-outcompatible with the standard 74LS logic family. All inputsare protected from damage due to static discharge by inter-nal diode clamps to VCC and ground